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Linedancer
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Functional Description
Linedancer HD
Overview
Functional Description
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Linedancer HD
Based on our 7th generation ASProCore architecture, Linedancer HD processor contains 4,096 processing elements, two 32-bit RISC CPUs, a powerful DMA engine, and a new high-speed streaming data I/O ideal for High Definition video processing and wireless infrastructure applications.

Learn more about Linedancer HD by clicking on different areas of the block diagram:

High bandwidth interface to external DRAM, up to 4GB

Linedancer HD provides glueless interfaces for up to four banks of external memory, using industry-standard DDR2 or RLDRAM interfaces to allow the use of low-cost commodity DRAM chips or modules.

Linedancer HD can address up to 4 GB of external memory, and each of the four banks has independent address connections, giving increased performance for algorithms with non-sequential data addressing.

Each bank has a 32-bit data interface, providing a peak aggregate bandwidth of up to 6.4 GB/sec when operating at 400 MHz.

Note: Information on Linedancer HD is Advance Information. Specifications are subject to change without notice.

 

 

 
 
 
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